Triple bios schematic/pcb design help

[modman1337]

I've been trying to get my head around designing a triple bios pcb solution for bios modding/testing. Sorta like the dual bios backup found in most modern motherboards from gigabyte only this will be for laptop bios testing.
It will be directly soldered onto the SOIC/DIP pads of the motherboard controlled by a slide switch, have room for 3 custom bios eeproms, the third maybe a removable test socket. Possible selection LED's, Write protect dip switch, clear cmos button.

I need help and advice with the schematics from the community as im not great with pcb design.

Any help and design recommendations will be greatly appreciated.

https://easyeda.com was used to create the design, .svg included for anyone to import

/Modman

[stj]

Re: Triple bios schematic/pcb design help

that wont work.
CS is active-low and the diodes will block the low signal from the motherboard.
why not just switch the vcc line?

[modman1337]

Re: Triple bios schematic/pcb design help

Thanks for the input stj, it is most valued.

My decision to use CS pin was based on work already done by http://blog.jacksoftlabs.com, i did wonder why he never chose to switch vcc.

what would be needed for an LED selection indicator given the board offering 3.3v on VCC, is there any protection circuitry you would add.

Frankly im looking for the simplest most compact design with a bit of functionality, i don't want to overcomplicate things.

"About the Dual-BIOS mod: here is the schematic according to the flash memory datasheet:
The SPI Chip Select (/CS) pin enables and disables device operation. When /CS is high the device is deselected and the Serial Data Output (DO) pin is at high impedance. When deselected, the devices power consumption will be at standby levels unless an internal erase, program or status register cycle is in progress. When /CS is brought low the device will be selected, power consumption will increase to active levels and instructions can be written to and data read from the device. After power-up,

/CS must transition from high to low before a new instruction will be accepted."

Pics from jacksoftlabs attatched

[stj]

Re: Triple bios schematic/pcb design help

i would just switch the VCC line and put a 330ohm resistor and led on the vcc line of each chip to indicate the active chip.

dont worry about WP, without vcc nothing will be written, and it cant happen by accident because in serial chips there is a write-command that has to take place.
unlike parallel chips that will write by pulling a pin.

i dont like that original schematic btw, it makes assumptions about the drive circuit.
it presumes the drive circuit is cmos and drags the pin high, when it could pull it low!

i should also warn you that not all diodes are created equal.
you used 1n4001's that have a voltdrop of about 1.1v and arent very fast.
the older circuit uses what i suspect are schottky diodes that will have half the voltdrop and be much faster.

btw, there should be a .1uf ceramic cap across the vcc and ground of each chip as close to the chip as
possible.

and you should consider Eaglecad, any "online" or "cloud" type crap is high risk.
it may suddenly not be there - unlike something on your harddrive!!

[modman1337]

Re: Triple bios schematic/pcb design help

Thanks STJ,

Some great advice there I'll come up with a new schematic and see what you think. So without the pull up part of the circuit there's no need for any diodes in the new schematic?

The main reason for WP was not fear of overwriting the wrong chip but paranoia, However unlikely, insyde bioses are very vulnerable to modification and attack, I'd feel safe knowing the chip is write protected. *carefully buts his tinfoil hat back on*

Can I ask the purpose of the ceramic cap? Am I right in thinking it's just to smooth out incoming current? Sorry if this is a very noobish question.

I've got eaglecad it was just simpler to get my ideas down on something. Pcb will be done in eagle.

Many thanks
Modman

[stj]

Re: Triple bios schematic/pcb design help

you can use WP through some jumpers or dipswitches, but be warned some bioses write data to themselves rather than using cmos ram.

no diodes needed,
the ceramic cap is not so much to shield the chip from external noise as it is to counter electrical ripple generated inside the chip.

also, remember that if your dealing wih a UEFI bios then it will be using a hidden parition on the harddrive to store stuff.

[modman1337]

Re: Triple bios schematic/pcb design help

Whilst drawing the new schematic I realised that if we're switching via Vcc CMOS memory on inactive chips isn't getting any power therefore bios will resort to setup defaults every time we select a different chip so any saved values are lost.

Can this be resolved in any way?

[modman1337]

Re: Triple bios schematic/pcb design help

here's what I have so far..

[stj]

Re: Triple bios schematic/pcb design help

Whilst drawing the new schematic I realised that if we're switching via Vcc CMOS memory on inactive chips isn't getting any power therefore bios will resort to setup defaults every time we select a different chip so any saved values are lost.

Can this be resolved in any way?

there is no cmos memory in eeproms that is volatile.

you raise an interesting point though, cmos settings are stored in ram in the RTC chip.
if your switching between variants of the same bios version number then no issues,
but if you have say 1.0. 1.1 etc then it could be a problem.
or not - it depends if the bios versions store the data differently.

it's recommended when upgrading a bios to reset cmos to avoid issues,
but at the same time, bios writers try to minimise problems by not changing addresses where stuff is stored etc.

it's a luck thing.

your schem looks o.k. but dont ground all the /cs pins.
the motherboard may use it to switch between multiple serial devices on the same bus.
if you force it low then it may clash with say, a temp sensor or something.

the other thing, put a 100 ohm resistor inline with each WP pin before they reach the dipswitch to limit the current if something else tries to pull it high.
and tie them together, there is no point having 3 switches if you only have one chip enabled at a time.

[modman1337]

Re: Triple bios schematic/pcb design help

I guess it'll be trial and error regarding cmos settings, may just have to clear cmos before switching maybe?
Not a big problem as i can manipulate the bios setup IFR (internal forms representation) to change a default value.

yes 3 switches does seem daft, left first chip cs grounded only.

As we have a test socket on the board what is the risk if any of esd damaging the other chips in the circuit? (possible frequent removal/insertion of chip)

[stj]

Re: Triple bios schematic/pcb design help

i dont like flip-top sockets, i prefer the type where you press the ends down to open the contacts.
http://www.ebay.co.uk/itm/271635665570

esd shouldnt be a problem.
i still dont understand why you want to ground any cs pins - that's the job of the host system.

[modman1337]

Re: Triple bios schematic/pcb design help

sure flip top socket types are not idea, the main thinking was I didn't want the overall design too tall, with the restricted height inside my laptops case.

Probably going to reduce the project to a two chip solution in the end or do two versions, just nice to have the option of a removable chip without having to get the rework station out and de-solder.

so the cs pins can just be ignored entirely and left floating?

[stj]

Re: Triple bios schematic/pcb design help

no, the cs pins have to connect to the cs pad on the laptop.

[modman1337]

Re: Triple bios schematic/pcb design help

Of course, I don't know what I was thinking mixing gnd with cs.
Anyway now onto pcb layout, get this mother etched.

Great stuff STJ, without ur input I'd still be scratching my head, or maybe have a burnt out board.

Any comments or ideas for features from the community welcomed.

[stj]

Re: Triple bios schematic/pcb design help

show your board layout, i'm interested how you connect it to the laptop

[fzabkar]

Re: Triple bios schematic/pcb design help

Wouldn't this be simpler?

                 VCC
                  +
                  |
            +----------+----------+
            |     |     |
            .-.    .-.    .-.
            | |    | |    | |
          R1 | |   R2 | |   R3 | |
            '-'    '-'    '-'
            |     |     |
            |  __   |  __   |  __
            +-o| |o- +-o| |o- +-o| |o-
            | o| |o- | o| |o- | o| |o-
            | o| |o- | o| |o- | o| |o-
  to         | o|__|o- | o|__|o- | o|__|o-
 mainboard       |     |     |
  /CS         | IC1   | IC2   | IC3
    _/o-------------+     |     |
  <--o/  o-----------------------+     |
     o-----------------------------------+
   SW1

[stj]

Re: Triple bios schematic/pcb design help

no, because you assume the mainboard drives cs low.
if the mainboard is mos then it will drive cs high and have a pulldown resistor.
in that case it's a battle of 2 resistors.

[fzabkar]

Re: Triple bios schematic/pcb design help

I very much doubt that there will be any problem. In any case it would be a simple matter to install a variety of pullups (eg 1K, 10K, 47K) on the existing motherboard and observe how it behaves. If you are really paranoid and cannot tolerate such a change to the circuit, then you could isolate each pullup resistor with its own jumper. ISTM that the other solutions are unnecessarily convoluted.

[modman1337]

Re: Triple bios schematic/pcb design help

Just a quick update to show my progress on this project, eagle files attached.
Let me know what you think.

[stj]

Re: Triple bios schematic/pcb design help

is it supposed to look like this!!