Gigabyte X570 Aorus Pro rev1.0 diagnostics

[Swell61]

Hello

I have a Gigabyte X570 Aorus Pro rev1.0 that doesn't work. I know the motherboard is at fault because the CPU, RAM and power supply have all been tested with a known good motherboard (including after trying them in the faulty board to check it hadn't killed them).

Thanks to some people on this website and elsewhere on the internet, I have a schematic and boardview for the WiFi version of this board, a schematic for the Elite version of this board (same board but cut down on features) and repair guides for other AM4 boards, one of which is for an Asus Tuf Gaming X570-Plus WiFi board. I have attached the relevant files below.

The symptoms the board shows are when it is powered on, the PSU turns on, the PCH fan turns on full blast and the CPU debug light is lit. There is no VCORE, and SLP_S5 and SLP_S3 are both high (3.3v).

I am trying to repair it but have fallen at the first hurdle, the current problem is the following:
The repair guide shows the power-on sequence for the board and it is the same across all of the AM4 repair guides I have seen so assume it applies to all AM4 boards. Step 1 to 3 seem OK. Step 4 is for RSMRST# to be asserted, and measuring it on my faulty board, it remains high on the CPU pin. Looking at the schematic and board view, the RSMRST_L pin on the CPU seems to be held at 1.8V (connected to A_VDD18S5) and is not connected to anything else (other than a capacitor) and measuring the voltage confirms this. It also shows the RSMRST pin on the EC is held high though the resistor in the schematic is not present on the board and measuring it shows it is around 0v. But the EC and CPU pins are not connected together in the schematic, or the board view, and there is no continuity between them on the board.

Looking at schematics for other AM4 boards, I can see that RSMRST is connected and can be controlled, unlike how this Gigabyte board seems. It is the same for the Gigabyte X570 Aorus Elite board, RSMRST doesn't appear to be connected. I'm not sure what "THROM SPARE GPIO" means or if it is relevant. I am also not sure of the significance of "-" appearing on one side of RSMRST (i.e. -RSMRST vs RSMRT-).

Am I missing something obvious?

[MOD EDIT] X570 AM4 Schematics https://www.badcaps.net/forum/showthread.php?t=125605
Reminder: rules and organization of this section - https://www.badcaps.net/forum/showthread.php?t=117484
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[Swell61]

Re: Gigabyte X570 Aorus Pro rev1.0 diagnostics

Sorry my bad, I thought keeping documents directly related to this would be best kept in the thread as I've seen other threads do the same

[Swell61]

Done some more poking with this. The power rails seem OK, VCORE is at 800mV. APU_PWOK is fluctuating though, because PM_PWRGD is fluctuating. It looks like this is the chipsets power good signal? I've closely inspected it and it looks like at some point there were 3 components that were ripped off the green PCB that the chipset is on. Is anyone able to identify them please? I am wondering if they are preventing the chipset from powering up properly. I've attached a photo and have circled the missing components. It looks like it took a good beating from someone fumbling around with the heatsink for it.

[Swell61]

On closer inspection of the board, it seems as though PM_PWRGD does not actually feed into APU_PWOK. The schematic shows a 0hm link with "* CHECK" next to it but it is not present on the board. I've found a high res picture of the same board online and it is also not present. The power for the PCH is present, I've probed the SMDs on the green PCB and it has 1.0v and 1.8v and it gets warm after being powered on for a short while.

[Swell61]

Another piece of the puzzle - I hooked up an old 20MHz CRO and can see APU_PWOK is fluctuating because PCH_1V0_GD is pulsing which is caused by AVDDP_EN pulsing on NPU1. This is because GLOBE_S3- is pulsing, due to SLP_S3- pulsing. I've checked SLP_S5- and this seems to be pulsing too. By pulsing I mean they are both high most of the time but I can just make out a dip to 0V on the CRO. PSOUT (power switch) seems to be behaving properly, it is high until I press the switch and goes high again once I let go and there is no pulsing. Not sure what would be causing the two SLP signals to pulse.

[Swell61]

The reset line is getting triggered rapidly. Not sure what from and I don't know if it a cause or a symptom.

[McWhitePink]

the components on PCH is mainly jsut caps, those shouldn't be an issue but just for filtering. you can populate some 0201 size 100nF caps.
I don't know what do you mean by fluctuating and reset line getting triggered. reset line should remain 3.3V once it gets powered.

[Swell61]

Thanks for your response.

By fluctuating, I mean the signal is high but on the scope I can see dips to 0v briefly. E.g. SUS_S3 is high but drops to 0v very briefly. This is doing things like turning off power controllers briefly which drops the voltage. APU PWR OK signal (the one that combines the other power ok signals) fluctuates between 800mV-1.6V which I assume is because the S3 signal keeps turning the PCH power supply that is part of the APU power signal on and off.

When the board has power but is not turned on, the reset line is high. When the power button is pressed, this drops to 0V with spikes to 3.3V. I'm not sure if this is because the IT8795E is holding it low after the board is turned on which could the the source of the fluctuating S3 and S5 signals, or if this is just another symptom of something else. I was trying to think of reasons why the S3 and S5 signals would be choppy and with my very limited experience, as these signals are so early on in the boot process, it is probably the processor beimg reset (either from a faulty CPU power supply (I'm not sure which one powere this part of the CPU) or from a reset lime going low). I tried disconnecting the third pin of FPQ350 but that didn't work, the board would power on briefly and then turn off.

I'm more tham happy to take any measurements and elaborate if it would help.

[McWhitePink]

if you don't have VCORE, you should try to measure around the VRM controller, VCC, en, fb， etc. usually it should be the enable pin not pulled high, so the VRM doesn't work.
SLP_S3 and S5 are supposed to be 3.3V once the board power is triggered.

[Swell61]

I think I do have VCORE, it's at 800mV. SLP_S3 and S5 are 3.3v but with the scope I can see very brief drops to 0V, as if the processor is being reset. This led me to check the reset lines where I found this choppy reset signal problem (it being high when the board has power but is off then when the power button is pressed to turn the board on, it drops to 0V with constant spikes to high). I am now trying to figure out why the reset line is being triggered. Something clearly seems unhappy as when the board is off, the signal is high, as expected. But when the board is turned on, it becomes erratic

[прямо]

If I'm not mistaken, SYS_RST- and APU_RST- and RESET- are all active low signals because of the - symbol. So they are held at 0V when the board is turned on, and 3.3V when the board is on standby because of the pull up resistors.

[McWhitePink]

If I'm not mistaken, SYS_RST- and APU_RST- and RESET- are all active low signals because of the - symbol. So they are held at 0V when the board is turned on, and 3.3V when the board is on standby because of the pull up resistors.

No, active low means if you want to reset the circuit, it will pull down the voltage level, during normal operation, it should be high to remain inactive status, otherwise your system will be in endless resetting itself.

[McWhitePink]

I think I do have VCORE, it's at 800mV. SLP_S3 and S5 are 3.3v but with the scope I can see very brief drops to 0V, as if the processor is being reset. This led me to check the reset lines where I found this choppy reset signal problem (it being high when the board has power but is off then when the power button is pressed to turn the board on, it drops to 0V with constant spikes to high). I am now trying to figure out why the reset line is being triggered. Something clearly seems unhappy as when the board is off, the signal is high, as expected. But when the board is turned on, it becomes erratic

I have seen the similar behavior before, but I forgot how did I fix it, or I haven't fixed it at all.
It could be due to one power is abnormal, so the SIO keep sending RST, or maybe the 3VSB/3VCC been shut down. suggest to look at all the power domains to make sure the powers are good.

[Swell61]

The PCH power (PM_1VSOC) is abnormal - it is on most of the time with drops to 0v very briefly visible on the scope. This is one of the power rails monitored by the IT9795E (the EC according to the schematic). It is enabled by the S3 signal though, which keeps dropping out, which I think is causing PM_1VSOC to be unstable. I see the SIO also monitors 7 voltages, I will check those, thank you for the pointer. I am away for the holidays so will continue the debugging in the new year. The SIO doesn't seem to have a direct connection to the RESET line, can it still cause it to toggle? Presumably through the EC?

EDIT: I see there is SIO_WD which looks like it can control the line if WD_CTRL is high

[McWhitePink]

The PCH power (PM_1VSOC) is abnormal - it is on most of the time with drops to 0v very briefly visible on the scope. This is one of the power rails monitored by the IT9795E (the EC according to the schematic). It is enabled by the S3 signal though, which keeps dropping out, which I think is causing PM_1VSOC to be unstable. I see the SIO also monitors 7 voltages, I will check those, thank you for the pointer. I am away for the holidays so will continue the debugging in the new year. The SIO doesn't seem to have a direct connection to the RESET line, can it still cause it to toggle? Presumably through the EC?

EDIT: I see there is SIO_WD which looks like it can control the line if WD_CTRL is high

I don't know about that, did you check the crystal output? do you have the clock signal? hopefully it's not the PCH issue.