+3.3V Parallel ATA Signalling?

[japlytic]

I have found PVR units with chipsets requiring +3.3V signalling, such as the Fujitsu SmartMPEG MB68H25A, but some like the ST STi5518 are apparently +5V I/O tolerant.

In a PVR with the ST STi5518 chipset has buffers with +5V-level outputs to the the chipset and the hard drive.
Another PVR; this time with a Fujitsu MB68H25A which has buffers with +3.3V-level outputs to the chipset and the hard drive.

So I am wondering about +3.3V parallel ATA signalling, and what ATA standard(s) made +3.3V signalling optional and/or mandatory.

[stj]

Re: +3.3V Parallel ATA Signalling?

there are 8 ata white papers so-far.

given that the logic is active-low and you can get away with 100k pullup resistors, i suspect the current at 5v would be too low to do damage.
also,
a quick look at most hd pcb's shows a whole aray of inline resistors behind the connector - probably as safety parts to limit current on the pins.