HP Pavilion 15 -- DAY23AMB6C0 REV C, Dead

[Jmine]

Re: HP Pavilion 15 -- DAY23AMB6C0 REV C, Dead

What about KBC_RST# on pin 13? I'd be checking these things after power is first applied too (after 3920_RST# goes high). EC might detect a fault condition and shut down for example. Failing that, I'd be re-programming the EC as @mon2 suggested with a SVOD or similar.

KBC_RST is also absent. I will report back once I reprogram it.

Is CH341A good programmer for a beginner? I am on an extremely tight budget here.

[mcplslg123]

Re: HP Pavilion 15 -- DAY23AMB6C0 REV C, Dead

RSMRST# is missing on pin 95 of KBC. What is the resistance on this pin?

[mcplslg123]

Re: HP Pavilion 15 -- DAY23AMB6C0 REV C, Dead

CH34A cant program this type of Ec. You need SVOD or similar programmer specially made for kbc programming.

[Jmine]

Re: HP Pavilion 15 -- DAY23AMB6C0 REV C, Dead

RSMRST# is missing on pin 95 of KBC. What is the resistance on this pin?

About 1Mohms

[reformatt]

Re: HP Pavilion 15 -- DAY23AMB6C0 REV C, Dead

Are you sure pin 19 is 0V? NBSWON1# should be pulled high to +3V_PCU. Also check your RTC clock section (U8) for a valid clock signal.

[mcplslg123]

Re: HP Pavilion 15 -- DAY23AMB6C0 REV C, Dead

Never seen resistance of 1M ohms on RSMRST# pin. Are you sure about your measurements?

[Jmine]

Re: HP Pavilion 15 -- DAY23AMB6C0 REV C, Dead

Are you sure pin 19 is 0V? NBSWON1# should be pulled high to +3V_PCU. Also check your RTC clock section (U8) for a valid clock signal.

Sorry. There must have been something wrong with my mutimeter. It's 3.1V.

3V_RTC is 3.01V

[Jmine]

Re: HP Pavilion 15 -- DAY23AMB6C0 REV C, Dead

Never seen resistance of 1M ohms on RSMRST# pin. Are you sure about your measurements?

Sorry. I've remeasured and its 24K

[reformatt]

Re: HP Pavilion 15 -- DAY23AMB6C0 REV C, Dead

Quanta boards unfortunately don't often have power sequence diagrams in their schematics. Pretty sure S5_ON assertion doesn't occur till after NBSWON1# goes low from the power button press. RSMRST#/EC_PWROK on other Quanta boards where there is a power sequence don't occur till after S5_ON is asserted.

AFAIK, KBC_RST# should be high in G3 to S5 transition, and this is controlled by the FCH. According to the Boston FCH datasheet:

On G3 to S5 transition, the BIOS will not be able to program this pin as Gevent1#. If the pin is used as Gevent1#, the design should ensure that the pin remains in logical high during the G3--> S5 --> S0 transition.

So you need to look at the FCH if KBC_RST# is being held low. First thing to check is for a valid 32khz RTC signal to the FCH.

[piernov]

Re: HP Pavilion 15 -- DAY23AMB6C0 REV C, Dead

KBC_RST# is used to reset the LPC interface here for communication between FCH and EC.
KBC_RST# connects to PCIRST# which should be used at the end of power sequence, it's probably only powered in S0.