Hello,
For reference, I am using the schematics of a Dell Optiplex 7050 Micro, D24M8, and will include them in the post if I can (I am a new member, so I'm not quite certain if it's against the rules or possible atm).
My question, what are the prerequisites for the PCH to output CPUPWRGD? I have a board that won't assert the signal, even though I have all prerequisite signals listed on the power sequence map, and I have confirmed all crystals are oscillating at proper frequencies as stated on the CLK diagram. The PCH has been replaced, and a known good SPI is flashed and installed. No dice. After hours of probing and reading correct values, I chalked it up to some internal trace damage and called it a day. But now, it's haunting me that I couldn't actually confirm the issue. Is there a possible timing issue involved? I've checked that the sleep signals are asserting at proper timing intervals with my oscilloscope but it seems like there's no obvious issues like ripple or signal assertion delays from what I can see. Is there anything I'm missing? Any help would be appreciated, including but not limited to posting in the proper threads
For reference, I am using the schematics of a Dell Optiplex 7050 Micro, D24M8, and will include them in the post if I can (I am a new member, so I'm not quite certain if it's against the rules or possible atm).
My question, what are the prerequisites for the PCH to output CPUPWRGD? I have a board that won't assert the signal, even though I have all prerequisite signals listed on the power sequence map, and I have confirmed all crystals are oscillating at proper frequencies as stated on the CLK diagram. The PCH has been replaced, and a known good SPI is flashed and installed. No dice. After hours of probing and reading correct values, I chalked it up to some internal trace damage and called it a day. But now, it's haunting me that I couldn't actually confirm the issue. Is there a possible timing issue involved? I've checked that the sleep signals are asserting at proper timing intervals with my oscilloscope but it seems like there's no obvious issues like ripple or signal assertion delays from what I can see. Is there anything I'm missing? Any help would be appreciated, including but not limited to posting in the proper threads
Comment