TPS51225CRUKR Voltage limit

[Bradbeat]

Hi,
I have a PGOOD pin down on this chip and I’m wondering if it could be because there is 5,2 v on VREG5 ( the high limit according to the datasheet is 5,1v ).
if yes, why is it to high?
the motherboard board is LA-G881P.
thank you.

here is some measurements :

• VIN = 16,3 V
• VREG3 = 3,299 V
• VREG5 = 5,203 V
• SW2 (repos) = 3,423 V, pikes at ~16,4 V
• VBST2 = 8,592 V → VBST2 − SW2 = ≈ 5,17 V
• VO1 = 5,28 V (stable)
• EN1 = 3,08 V, EN2 = 3,04 V
• VFB1/VFB2 ≈ 2,1 V

[mon2]

No. Pgood is open drain so it must feature an external pull up resistor to park the line when the signal is released. When Vout is 95% reached, the line should float.

[Bradbeat]

Thank you for your answer,
I can't see any pull up on the board so I assume it is in the super I/O chip?
If it is, is the SIO burnt or could it be un SIO firmware issue?